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Socionext Europe GmbH
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Socionext Europe

Video Codec

The amount of video data being transferred through the world´s networks is increasing dramatically, driven by both technical innovation and the way that users wish to experience video information.

Here at Socionext we are the link between ´source´ which is the video authoring process, and ´destination´ which is the image display process.

We offer the World´s most advanced video codec technology to ensure image transmission of the highest quality. This is backed up by a proven track record and expertise in video systems and broadcasting, and our expertise in graphic solutions, thereby enabling full end-to-end solutions for video transmission and display.

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Product Lineup

SC2M50 provides video encoding and decoding that support HEVC/H.265 standard. SC2M50 is a slave type codec IC controlled by host CPU via PCIe interface.

Features

  • 4K/60p HEVC/H.265 real-time encoding/decoding
  • HEVC encoding algorithm supporting HDR(High Dynamic Range) Video
  • Low power consumption(3.5W at 4K/60p HEVC encoding) enables battery powered system


Applications

  • IP video distribution
  • Wireless video transmission
  • Medical
  • Signage
Block Diagramm Block Diagramm

Specifications

VideoencodingHEVC Main, Main10, Format Range Extensions (4:2:2 / 4:2:0, 8/10bit, up to 4K 60p)
decodingHEVC Main, Main10, Format Range Extensions (4:2:2 / 4:2:0, 8/10bit, up to 4K 60p)
AudioencodingMPEG1 Audio Layer2 MPEG2 AAC-LC SMPTE302M (LPCM)
decodingMPEG1 Audio Layer2 MPEG2 AAC-LC SMPTE302M (LPCM)
Stream input / outputTS input x 1 TS output x 1
Video input / output20bit Parallel I/F input x 4, output x 4 YUV 4:2:2 10bit up to 4K 60p SMPTE-435(Square Division), SMPTE ST2036-3 (2-Sample Interleave Division), SMPTE 424M (3G-SDI), SMPTE 274M, SMPTE 292M (HD-SDI), SMPTE 259M-C (SD-SDI)
Audio input / outputI2S x 2
Peripheral interfacePCI express Gen 2.0 (4 lanes, Max payload size 512 byte) USB 2.0 Device x 1 UART x 4 I2C x 3 SPI x 2 GPIO x 64
Memory interfaceSerial flash interface HSSPI x 1 LPDDR4 2400Mbps 16bits x 6 (maximum)
Image processingVideo overlay (option)
Technology28nm Process / 1,361 pin FCBGA 25?? x 25mm
Power Consumption3.5W (Typical)

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“MB86M30” provides video and audio encoding, decoding, and transcoding with supporting HEVC/H.265, AVC/H.264 and MPEG2 standard.
MB86M30 is slave type device controlled by host CPU via PCIe interface.

Features

  • 4K/60p HEVC/H.265 or AVC/H.264 real-time encoding/decoding
  • 4K/60p HEVC/H.265 encoding with 10ms ultra low latency (Option)
  • HEVC encoding algorithm supporting HDR (High Dynamic Range) Video
  • Low power consumption (6.3W at 4K/60p HEVC encoding) and embedding four DRAMs in package enable high density in the system


Applications

  • Broadcasting
  • IP Video distribution
  • Medical
  • Signage
Block Diagramm Block Diagramm

Specifications

VideoEncodingHEVC/H.265 4:2:2 10bit (up to 4096 x 2160p60) AVC/H.264 4:2:2 10bit (up to 2160p60) MPEG2 4:2:0 8bit (up to 1080i59.94, 1080p30)
Ultra Low Latency Encoding *1HEVC/H.265 4:2:2 10bit (up to 4096 x 2160p60) Latency: 10ms
Decoding *2HEVC/H.265 4:2:2 10bit (up to 4096 x 2160p60) AVC/H.264 4:2:2 10bit (up to 2160p60) MPEG2 4:2:0 8bit (up to 1080i59.94, 1080p30)
Transcoding *3HEVC to HEVC, H.264 to HEVC, MPEG2 to HEVC, etc.
Pre-ProcessingDe-Interlacing, Scaling, Filtering, Video overlay
Multiple channel operationUp to 4ch @HEVC/H.265 encoding, 1080p60
HDR ready
AudioEncodingLPCM, AAC-LC, MPEG1-Layer2
DecodingLPCM, AAC-LC, MPEG1-Layer2
Pass through
Stream processingTS MUXUp to 4ch
TS DEMUXUp to 4ch
InterfaceControlPCIe 2.0
StreamPCIe 2.0, TS-Serial Input x 4ch, TS-Serial Output x 4ch
VideoPCIe 2.0, Video Parallel Input x 4ch, Video Parallel Output x 4ch
AudioI2S Input x 4 stereo pair, I2S Output x 4 stereo pair
SystemInternal MemoryLPDDR4-2400 8Gbits x 4pcs
External MemoryLPDDR4-2400 (16bit x 2ch) x 2pcs
Boot DeviceSPI Flash
PackageFCBGA 74.5mm x 47.5mm

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“MB86M31” provides H.265/HEVC 4K60p real-time encoding by single chip. The MB86M31 is slave type device controlled by host CPU via PCIe interface.

Features

  • HW base H.265/HEVC 4K60p real-time video encoder
  • Support Main 4:2:2 10 profile necessary for broadcasting applications
  • Support multi-channel video encoding: 1080p60 4ch, 720p60 8ch, 480p 16ch
  • Low power consumption


Applications

  • Broadcasting
  • Video capture
  • Medical
Block Diagram Block Diagram

Specifications

VideoEncodingH.265/HEVC Main, Main 10, Main 4:2:2 10 profile Multi channel encoding: 4K60p 1ch, 1080p60 4ch, 720p60 8ch, 480p 16ch
Interface ControlPCIe Gen 2.0
PeripheralPCIe Gen 2.0 (4 lanes x2, 5.0 GT/s, Max payload size 1024 Bytes, Lane reversal supported) UART (4 channels) I2C (2 channels) SPI (1 channel) GPIO (64 pin)
Video20bit parallel interface (4 channels) support YUV4:2:2 10bit up to 4K Support embedded sync (CEA-861)
SystemCPUARM Cortex-A7 400MHz single core
Memory I/FDDR3 SDRAM 1333Mbps (16bitx2, 4channels)
Boot DeviceSerial flash, Nor Flash
Physical Power supplyInternal Logic: 1.2V, Analog: 1.2V/3.3V, I/O: 1.5V / 1.8V
Operating temperatureTa = 0 to 70°
PackageFCBGA-1764 (35mm x 35mm, 0.8mm pitch)

Deliverables for system development

Evaluation board

  • PCIe card form
  • Support 4ch 3G-SDI input

Software Development Kit

  • Including Host CPU driver, sample application (Source code)


Documentation

  • MB86M31 datasheet, evaluation board schematic, board design database
  • Host CPU driver, Sample application software, Control command document

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