Most Advanced Network SoC Solutions — Meeting Growing Network Demand

Due to the proliferation of smart devices, expansion of cloud computing, increase in Internet distribution of 4K videos, and other technologies and services, network capacity demand is continuing to grow rapidly.  Coherent optical data transmission at rates of 100Gbps and higher is the key underlying technology supporting capacity growth in core, Metro and data communications fiber-optic networks.  Socionext provides IP and base technology for the most advanced digital coherent SoCs being deployed today.

While 100G optical networks are rapidly expanding, it is essential to carry out research and development to ensure the production of next-generation 400G and 1T (Terabit)optical networks. With over 40 years’ experience in developing custom SoCs, combined with specialist high-speed analog, mixed-signal and digital design, Socionext continues to design systems for current and future optical and wireless networks, including advanced IP for scaling from 100G to 1T data rates.

Wireless Communications, 4G/5G, Antennna Front-ends

  • Advanced CMOS converter technology optimized for wireless communications
  • Highly integrated SoCs with single- and multi-channel ADC/DAC
  • Support for single-, multiple-, and MIMO antennas
  • Signal processing on same die as converters
  • Single-chip solution significantly reduces the number of devices
  • Low power consumption, small footprint  
  • Our technology is integrated into state-of-the-art wireless communications and antenna front-end ASICs
  • Socionext custom and network ASICs are used in a range of wireless communications environments
  • Ideal for wireless communications in front- and back-hauling, 4G/5G, and antenna front-ends


Direct-RF 7GHz ADC and DAC IP


Direct-RF 7GHz ADC and DAC IP V1.pdf
Size: 1.016 Megabyte | Date: 16.03.2021 03:12

Advanced IP for Scaling from 100G to 1T data rates

We provide all the necessary analogue IP blocks, digital cells, memory blocks and standard interfaces to help systems developers implement their digital coherent DSP designs as full SoCs. Key IP hard-macros include high-performance, low-power, high-speed ADCs, DACs and SerDes to support systems using a variety of different modulation formats. 

A range of optical line-side Baud rates is also supported to enable dedicated, low-power coherent Metro solutions as well as multi-mode coherent solutions.  We also provide IP blocks for the realization of very low power direct detection SoCs based on DMT and PAM-4 modulation.

Socionext offers Direct Detect Single λ 100G DMT ASSP solution that can be used for Front- and Backhaul applications in optical networks or future hybrid LTE-5G (CPRI and eCPRI) applications.

Brand new case study published as post deadline paper at OFC 2020.

400Gb/s Real-time Transmission Supporting CPRI andeCPRI Traffic for Hybrid LTE-5G Networks

We present the first CMOS ASIC to support either 4×25Gb/s eCPRI or 4×24.33Gb/s CPRI-10 traffic per optical wavelength and demonstrate 200Gb/s and 400Gb/s transmissions in O and C bands over 20km for hybrid LTE-5G fronthaul networks.

400Gb/s Real-time Transmission Paper


Size: 1.205 Megabyte | Date: 16.03.2021 03:12

100Gbps DMT ASIC for Hybrid LTE-5G Mobile Fronthaul Networks

This paper introduces a 100 Gb/s discrete multi-tone modulation (DMT) ASIC which has been designed and fabricated in 16 nm CMOS process, specifically targeting MFH applications. In addition, in several transmission scenarios, the advantages of DMT format over conventional PAM4 format for MFH applications are highlighted.

100Gbps DMT ASIC for Hybrid LTE-5G Mobile Fronthaul Networks


100Gbps DMT ASIC for Hybrid LTE-5G Mobile Fronthaul Networks.pdf
Size: 2.576 Megabyte | Date: 16.03.2021 03:12


16nm DAC IP H-Family Flyer


16nm DAC IP H-Family V1.0.pdf
Size: 1.324 Megabyte | Date: 16.03.2021 03:12

16nm ADC IP H-Family Flyer


16nm ADC IP H-Family V2.2.pdf
Size: 0.704 Megabyte | Date: 16.03.2021 03:12

100Gbps DMT Transceiver Device SCK101CR3


Size: 0.625 Megabyte | Date: 16.03.2021 03:12

SerDes Macro SNIHS7CTR4VB0 Flyer


16nm 28Gbps Low Power SerDes.pdf
Size: 0.278 Megabyte | Date: 16.03.2021 03:12


SNEUADCDAC16H Development Kit


16nm ADC_DAC Development Kit V4.pdf
Size: 0.786 Megabyte | Date: 16.03.2021 03:12

SerDes Macro SNIHS7DTR4VB0 Flyer


16nm 28G11Gbps SerDes Macro.pdf
Size: 0.252 Megabyte | Date: 16.03.2021 03:12

SoC Design Services

Back-end design including full ASIC physical implementation, DFT, package design, device qualification and manufacturing are all part of our service offering.

With many years of experience in delivering digital coherent SoCs, we have a strong track record in helping to deliver the right performance, power and flexibility in systems.

IP and Base Technology for the most Advanced Digital Coherent SoCs

Networking IP Portfolio for Leading Semiconductor Process Technologies

  • Low-power, high-speed ADC
  • Low-power, high-speed DAC
  • Low-power High-speed VSR/MR/LR SerDes (1–56 Gb/s)
  • Jitter Cleaning PLLs
  • Temperature Sensor

ASSP (Application Specific Standard Product)

  • 100G Discrete Multi-Tone (DMT) Transceiver

Large Scale, Small Size, and Low Power Consumption

Digital coherent LSIs are indispensable for increasing capacity but these carry with them the problems pf complexity of design, increased size of equipment, and greater power consumption. We have developed SoCs with large capacities, small sizes, and low power consumption through realization of 65nm, 60nm, 28nm, and further advanced technologies.

In addition, we provide not only SoCs, but also total solutions that include proven high-speed and large-pin-count package design, and verification.


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