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High-Performance & Custom ASIC (SoC) Details

With their high performance functionality and high extensibility, PF SoC reduces risks associated with the development of SoCs and achieves low power consumption of products.


High Performance CPUs

PF SoCs have multiple ARM Cortex-A15* CPU cores that allow them to operate at high speeds. In addition to the Cortex-A15, PF SoCs also have ARM Cortex-A7 CPU cores, which are compatible with the Cortex-A15 as well as the software used and have low power consumption. By using these CPU cores and configuring the big. LITTLE architecture proposed by ARM, PF SoCs meet two conflicting needs - high processing performance and low-power operation - at a high level. These CPU cores can also be used independently as AMP (asymmetric multiprocessing) processors.
*Excluding the MB86S73

Advanced GPUs

In addition to their high performance CPUs, PF SoCs have ARM Mali-T624 GPUs. Using the advanced Mali-T624 GPU, PF SoCs achieve GPGPU computing that improves the performance of overall parallel computing as well as sophisticated graphics processing.


High Extensibility

Function Enhancement with PCI Express
The PF SoC has PCI Express. By connecting user logic and the PF SoC, users can use both the logic that is their unique advantage and a CPU with high processing performance.

Function Enhancement with USB
As an example of function enhancement with USB, a SATA interface can be enhanced by connecting Socionext's USB3.0-SATA bridge LSI (MB86C311/MB86E501) to a PF SoC to enable hard disks (HDD) and other storage devices to be connected to it.


Low Power Consumption

Standby and Response Function
PF SoCs have a standby and response function for enabling power saving on devices with network interfaces. By stopping the supply of power to network devices when they are in an idle state and autonomously responding to access from the network as a proxy, this function reduces the power consumption of the system while maintaining a connection with the network. In the event that the system receives data requiring a system restart, the function turns on the power to the CPU to enable the system to start quickly.

Fine Power Domain Control
By stopping the power supply to functions of the SoC that are not in use, system power consumption can be reduced. PF SoCs divide the entire SoC into multiple power domains in order to enable fine power control.

DDR Retention Mode
PF SoCs have a function to set memory devices to self-refresh mode, in which the power of the PF SoC, excluding the minimum required blocks, is shut down (DDR retention mode). This innovative feature allows PF SoCs to stand by with low power consumption that is well below 1 mW and to quickly start up when resuming from standby. This feature contributes to the reduction of system power consumption and resumption time when a system is operated using a battery for the power supply.


Reduced Risk in Custom SoC Development

Meanwhile, using a chipset (2) has the following advantages. As the development costs will be reduced and the development period will be shorter in such development, it is possible to start evaluating a custom LSI using a board with an ES within three months, at the earliest, from the start of development of the custom LS

Even when developing a new custom SoC (3), various risks can be reduced by developing it based on the existing PF SoC (1). The components of the PF SoC, including CPU/GPU cores, memory interface block associated with them, media processing block, and high-speed interface block, have been defined previously. Reusing for them when developing a new SoC allows you to significantly reduce the time required for logical design and verification. You can start developing software without waiting for the completion of the engineering sample (ES).

Meanwhile, using a chipset (?) has the following advantages. As the development costs will be reduced and the development period will be shorter in such development, it is possible to start evaluating a custom LSI using a board with an ES within three months, at the earliest, from the start of development of the custom LSI.


Product Specifications List

Function MB86S71 MB86S72 MB86S73
Package
CPU Core Cortex™-A15
2core Up to 1.6GHz
1MB-L2C
Cortex™-A15
2core Up to 1.6GHz
1MB-L2C
Cortex™-A7
2core Up to 1.2GHz
512kB-L2C
Cortex™-A7
2core Up to 1.2GHz
512kB-L2C
Cortex™-A7
2core Up to 1.2GHz
512kB-L2C
3D/GPGPU Mail™-T624
1core 400MHz 32kB-L2C
Mail™-T624
1core 400MHz 32kB-L2C
Mail™-T624
1core 400MHz 32kB-L2C
MEMC DDR3 1.6GHz,
DDR3L 1.333GHz,
LPDDR3 1.333GHz, 64bit/32bit
DDR3 1.6GHz,
DDR3L 1.333GHz,
64bit/32bit
DDR3-1.333GHz,
DDR3L-1.066GHz,
64bit/32bit
SCB CPU 125MHz 125MHz 125MHz
LAN GbE, WoL
TCP Accelaration
GbE, WoL
TCP Accelaration
GbE, WoL
TCP Accelaration
FLASH-IF HSSPI, NOR, eMMC,
NAND
HSSPI/NOR
HSSPI, NOR, eMMC,
NAND
HSSPI/NOR
HSSPI, NOR, eMMC,
NAND
HSSPI/NOR
SERIAL-IF UART 3ch, GPIO 16ch,
I2C 3ch
UART 3ch, GPIO 16ch,
I2C 5ch
UART 3ch, GPIO 16ch,
I2C 4ch
CODEC 4K-compatible multi-stream video,
32k x 32k JPEG CODEC
32k x 32k JPEG CODEC 32k x 32k JPEG CODEC
Display HDMI / MIPI DSI FPD Link (4lane) FPD Link (4lane)
AUDIO 2ch I2S 2ch I2S 2ch I2S
SD 2ch SDIO 2ch SDIO 1ch SDIO
PCIe 1ch PCIe-Gen2-4lane +
Data Scrambler
2ch PCIe-Gen2-4lane +
Data Scrambler
2ch PCIe-Gen2-4Lane +
Data Scrambler
USB 3.0 1ch Host 2ch Host 2ch Host
USB 2.0 1ch Device 1ch Host,
1ch Host/Device
1ch Host
1ch Host/Device
Development evaluation board

A development evaluation board is provided for each PF SoC product. Since a Linux BSP is provided for each PF SoC product, customers can commence their development and evaluation immediately. We provide a semicustom board that can be used to evaluate custom LSIs using user logic by connecting it with a development evaluation board for PF SoCs. Approximately 15 million gates of user logic can be written on the FPGA installed on the semicustom board.


Platform Software

Solving challenges in system development, such as an increasing scale and performance improvement, requires enhanced software. For this reason, Socionext provides "platform software" (PF SW). This software increases the efficiency of software development by maximizing the performance of PF SoC, enhancing the reusability and performance portability of current software assets, and simplifying the introduction of third-party software.

Supporting the Use of the Standard Open Framework
Of software in embedded devices, PF SW belongs to the software layer that serves basic functionality, and supports the use of the Open Framework standard, including OpenGL and OpenCL, in addition to other software, including the drivers and firmware that control PF SoC and Linux Kernel.

Providing Common Software for All Product Series
Since common PF SW is provided for all PF SoCs, the compatibility of higher level applications is increased and reusability of current software is enhanced, which is effective in reducing development risks such as the development period and development costs. The same benefits can be also enjoyed with custom SoCs developed based on PF SoC.

Reducing the Burden of System Development
Pieces of software related to specific functions, including the processing function related to system control, the security function, and the network standby and response function, are consolidated into the System Controller Firmware (SCFW). Applications control the SoC through this firmware. PF SoC users can reduce the burden of developing relevant functions by using this firmware which functions together with Linux and shift their resources to application development.
For example, to transition SoC to power saving mode, applications use a general Linux framework. In a lower layer, however, Linux and SCFW operate in close cooperation. This enables state transition without requiring application developers, in particular, to be aware of the SoC power supply or clock control functions. SCFW also assumes control of resumption from power saving mode. Linux and SCFW share the role of controlling SoC, which enables more robust systems and flexible extension and customization of hardware.
This minimizes the impact on the kernel or BSP when a new custom SoC is developed and makes it possible to quickly obtain the PF SoC and other software that operate the SoC.

Future Plans
In the future we will increase the availability of middleware and expand the scope of support for embedded OSs and other software while aggressively promoting the use of open source software and collaboration with our partners.
In addition, as a method for simplifying the power control of an entire system, we at Socionext will provide a unique solution that will seamlessly manage the power of custom LSIs as well as PF SoCs from an application on Linux.

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